Compact low power high slew rate CMOS buffer for large capacitive loads

被引：20

作者：

Torralba, A ^{[1
]}

Carvajal, RG

Galan, J

Ramirez-Angulo, J

机构：

[1] Univ Sevilla, Escuela Super Ingn, Dept Ingn Elect, Seville, Spain

[2] New Mexico State Univ, Klipsch Sch Engn, Dept Elect Engn, Las Cruces, NM 88003 USA

来源：

ELECTRONICS LETTERS | 2002年 / 38卷 / 22期

关键词：

Capacitance - Computer simulation - Electric loads - Electric potential - VLSI circuits;

D O I：

10.1049/el:20020952

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new compact CMOS class AB buffer for capacitive loads is presented. Its simple implementation relies on the use of the flipped voltage follower. Simulation results from a 0.35 mum CMOS technology are presented that prove the operating principle under low power conditions. This buffer can also find application in testing of analogue CMOS VLSI circuits, as the input capacitance can be very low without diminishing its output drive capability.

引用

页码：1348 / 1349

页数：2