共 50 条
- [2] Fast Timing Analysis of Non-Tree Clock Network with Shorted Wires PROCEEDINGS OF THE 2018 GREAT LAKES SYMPOSIUM ON VLSI (GLSVLSI'18), 2018, : 279 - 284
- [3] Accurate Transformation-Based Timing Analysis for RC Non-Tree Circuits ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 2942 - +
- [4] Optimal Transformation of Non-tree Topologies for Timing Analysis 2009 ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIMEASIA 2009), 2009, : 69 - +
- [5] Width-Constrained Wire Sizing for Non-Tree Interconnections 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 2586 - 2589
- [7] Optimal wire and transistor sizing for circuits with non-tree topology 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 252 - 259
- [8] Global pose estimation using non-tree models 2008 IEEE CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION, VOLS 1-12, 2008, : 895 - 902
- [10] A CTW scheme for non-tree sources DCC '96 - DATA COMPRESSION CONFERENCE, PROCEEDINGS, 1996, : 454 - 454