A Lower Error and ROM-Free Logarithmic Converter for Digital Signal Processing Applications

被引:54
作者
Juang, Tso-Bing [1 ]
Chen, Sheng-Hung [1 ]
Cheng, Huang-Jia [1 ]
机构
[1] Natl Pingtung Inst Commerce, Dept Comp Sci & Informat Engn, Pingtung 900, Taiwan
关键词
Digital signal processing (DSP); logarithm; very large scale integration (VLSI) design; ELEMENTARY-FUNCTIONS; COMPUTATION; IMPLEMENTATION; ALGORITHM; POWER;
D O I
10.1109/TCSII.2009.2035270
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this brief, we propose a lower error and ROM-free logarithmic converter. The proposed converter can lead to area-efficient hardware implementation as it avoids the need for a ROM by employing simple computation units for logarithmic approximation. Our proposed logarithmic conversion algorithm partitions the exact logarithmic curve into two symmetric regions such that the slopes in the two regions that are used for logarithmic approximation are inversed. Simulation results show that the proposed algorithm achieves an error range and percentage error range of only 0.045 and 3.339%, respectively, which outperforms previously proposed one-region and two-region conversion methods. We have implemented the proposed logarithmic converter using 0.13-mu m CMOS technology, and the latency is 2.8 ns. The proposed converter can be used to reduce the overhead of computation-intensive operations for real-time digital-signal-processing applications.
引用
收藏
页码:931 / 935
页数:5
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