Low power components for 1 Gb/s optical communications: A single-chip 10-channel optical receiver and a clock recovery circuit

被引：1

作者：

Hickling, RM

Kot, RA

Yagi, MN

Nagarajan, R

Sha, WJ

Craig, R

机构：

来源：

GAAS IC SYMPOSIUM - 19TH ANNUAL, TECHNICAL DIGEST 1997 | 1997年

关键词：

D O I：

10.1109/GAAS.1997.628269

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A single chip, 10-channel optical transimpedance receiver and a low-power, single channel clock recovery circuit have been designed and characterized. The 10-channel receiver operates from a single 3.3V or 5V power supply, is capable of automatic offset correction, and generates ECL or PECL output levels. The clock recovery circuit operates from a single 5V power supply and is based upon a novel variation on the so-called early-late gate bit synchronizer loop.

引用

页码：201 / 204

页数：4

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