Fabrication of SONOS-type flash memory with the binary high-k dielectrics by the sol-gel spin coating method

被引：5

作者：

Ko, Fu-Hsiang ^{[1
]}

You, Hsin-Chiang

Chang, Chun-Ming

Yang, Wen-Luh

Lei, Tan-Fu

机构：

[1] Natl Chiao Tung Univ, Inst Nanotechnol, Hsinchu 300, Taiwan

[2] Natl Chiao Tung Univ, Inst Elect Engn, Hsinchu 300, Taiwan

[3] Feng Chia Univ, Dept Elect Engn, Taichung 407, Taiwan

来源：

JOURNAL OF THE ELECTROCHEMICAL SOCIETY | 2007年 / 154卷 / 04期

关键词：

D O I：

10.1149/1.2433705

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

We fabricated the binary high-k (HfxZr1-xO2) nanocrystal memory using a very simple sol-gel spin coating method and 900 degrees C 60 s rapid thermal annealing (RTA). From the transmission electron microscopy identification, the nanocrystals were formed as the monolayered charge trapping site after 900 degrees C 60 s RTA and the size was ca. 5 nm. We verified the electrical properties in terms of program-erase speed, charge retention, and endurance. The sol-gel device exhibited the long charge retention time of 10(4) s with only 2.5% charge loss, and good endurance performance for program/erase cycles up to 10(5). (c) 2007 The Electrochemical Society.

引用

页码：H268 / H270

页数：3

共 16 条

[1] Introduction to Flash memory [J].

Bez, R ;

Camerlenghi, E ;

Modelli, A ;

Visconti, A .

PROCEEDINGS OF THE IEEE, 2003, 91 (04) :489-502

[2] Performance and reliability features of advanced nonvolatile memories based on discrete traps (silicon nanocrystals, SONOS) [J].

De Salvo, B ;

Gerardi, C ;

van Schaijk, R ;

Lombardo, SA ;

Corso, D ;

Plantamura, C ;

Serafino, S ;

Ammendola, G ;

van Duuren, M ;

Goarin, P ;

Mei, WY ;

van der Jeugd, K ;

Baron, T ;

Gély, M ;

Mur, P ;

Deleonibus, S .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2004, 4 (03) :377-389

[3] Metallorganic chemical vapor deposition of Sr-Ta-O and Bi-Ta-O films for backend integration of high-k capacitors [J].

Goux, L. ;

Vander Meeren, H. ;

Wouters, D. J. .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2006, 153 (07) :F132-F136

[4] PolySi-SiO2-ZrO2-SiO2-Si flash memory incorporating a sol-gel-derived ZrO2 charge trapping layer [J].

Hsu, Tzu-Hsiang ;

You, Hsin-Chiang ;

Ko, Fu-Hsiang ;

Lei, Tan-Fu .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2006, 153 (11) :G934-G937

[5] Comparison of the electrical properties of poly-Si/Hf-silicate gate stacks fabricated by ALD employing BDMAS and TDMAS precursors [J].

Kamiyama, S ;

Miura, T ;

Nara, Y .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2006, 153 (03) :G187-G191

[6] Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance [J].

She, M ;

King, TJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (09) :1934-1940

[7]

SUGIZAKI T, 2003, VLSI S, P27

[8]

Takata M, 2003, 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, P553

[9]

Tan YN, 2004, IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, P889

[10] Over-erase phenomenon in SONOS-type flash memory and its minimization using a hafnium oxide-charge storage layer [J].

Tan, YN ;

Chim, WK ;

Cho, BJ ;

Choi, WK .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (07) :1143-1147

← 1 2 →