Improving Lifetime of Memory Devices Using Evolutionary Computing Based Error Correction Coding

Error correction coding (ECC) plays an important role in the reliability improvement of circuits having application in space and mission critical computing-, low-power CMOS design-, microprocessor based computing-, and nanotechnology-based systems. Conventional ECC are not suitable for multiple bit detection and correction. A memory circuit holds both instruction and data of the given system and it is susceptible to multiple bit soft error problems. To mitigate such kind of problems in memory circuit, an evolutionary computing based new ECC called reconfigurable matrix code (RMC) is suggested in this paper. The proposed RMC are evaluated in terms of error correction coverage. The results show that the proposed RMC technique can drastically increase the Mean-Error-To-Failure (METF) and Mean-Time-To-failure (MTTF) up to 50 % and hence the life time of the memory devices is more compared to conventional coding techniques based memories.