A software-based error detection technique using encoded signatures

被引：13

作者：

Sedaghat, Yasser ^{[1
]}

Miremadi, Seyed Ghassem ^{[1
]}

Fazeli, Mahdi ^{[1
]}

机构：

[1] Sharif Univ Technol, Dependabel Syst Lab, Tehran, Iran

来源：

21ST IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS | 2006年

关键词：

D O I：

10.1109/DFT.2006.11

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this Paper, a software-based control flow checking technique called SWTES (Software-based error defection Technique using Encoded Signatures) is presented and evaluated This technique is processor independent and can be applied to any kind of processors and microcontrollers. To implement this technique, the program is partitioned to a set of blocks and the encoded signatures are assigned during the compile time. In the run-time, the signatures are compared with the expected ones by a monitoring routine. The proposed technique is experimentally evaluated on an ATMEL MCS51 microcontroller using Software Implemented Fault Injection (SWIFI). The results show that this technique defects about 90% of the injected errors. The memory overhead is about 135% oil average, and the performance overhead varies between 11% and 191% depending on the work-load used.

引用

页码：389 / +

页数：2

共 21 条

[1] Design and evaluation of system-level checks for on-line control flow error detection
Alkhalifa, Z
Nair, VSS
Krishnamurthy, N
Abraham, JA
[J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1999, 10 (06) : 627 - 641
[2] CZECK EW, 1990, P 20 FAULT TOL COMP, P236
[3] EIFERT JB, 1995, P 25 INT S FAULT TOL, P106, DOI DOI 10.1109/FTCSH.1995.532620
[4] ERSOZ A, 1985, 858 CRCTR STANF U
[5] A software-based concurrent error detection technique for PowerPC processor-based embedded systems
Fazeli, M
Farivar, R
Miremadi, SG
[J]. DFT 2005: 20TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, 2005, : 266 - 274
[6] Soft-error detection using control flow assertions
Goloubeva, O
Rebaudengo, M
Reorda, MS
Violante, M
[J]. 18TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2003, : 581 - 588
[7] ARCHITECTURAL PRINCIPLES FOR SAFETY-CRITICAL REAL-TIME APPLICATIONS
LALA, JH
HARPER, RE
[J]. PROCEEDINGS OF THE IEEE, 1994, 82 (01) : 25 - 40
[8] LU DJ, 1982, IEEE T COMPUT, V31, P681, DOI 10.1109/TC.1982.1676066
[9] MADEIRA H, 1992, DEPENDABLE COMPUTING, V2, P395
[10] Majzik I., 1995, Periodica Polytechnica Electrical Engineering, V39, P27

← 1 2 3 →