Improving NAND Flash Read Performance Through Learning

Two important performance metrics for a storage system are the latency associated with retrieving data from its storage medium and the effective lifetime of its storage medium. Both metrics are directly affected by the number of raw read errors (i.e. errors prior to exploiting error-correction mechanisms). This paper focuses on NAND flash memories, where a read is performed by comparing stored voltages with a threshold voltage. The unwanted variation of stored voltages causes read errors. This paper identifies number of flash program-erase (PE) cycles, time elapsed between writing and reading, and the page number (physical location) as the main sources of voltage variations. It then proposes a method for learning how read thresholds should vary with these parameters such that the storage controller can dynamically vary thresholds and minimize read errors. Lab experiments show that at the flash end-of-life, the proposed method lowers the raw bit-error-rate up to a factor of 6, as compared to manufacturer's default read settings.