A data-independent 9T SRAM cell with enhanced ION/IOFF ratio and RBL voltage swing in near threshold and sub-threshold region

The conventional 8T SRAM cell with isolated read port is suggested as an alternative to overcome the read-write conflicts associated with 6T SRAM cell. However, in near threshold and sub-threshold regions, 8T cell performance is limited by reduced I-ON/I-OFF ratio, deteriorated RBL voltage swing, data dependency, and higher read failures, although the existing SRAM cells address some of these issues but still suffer from degraded performance due to the trade-off between leakage and read currents. In this paper, a 9T SRAM cell with novel read port is proposed that aims for low and data-independent leakages, high I-ON/I-OFF ratio, and large RBL voltage swing in near threshold and sub-threshold regions. The performance of the proposed cell is compared with 7T, 8T, 9T, and 10T cells at 32 nm technology node by simulating a column of 128 cells to demonstrate its versatility over others. The proposed cell shows enhanced I-ON/I-OFF ratio (71.2X), large RBL voltage swing and data-independent leakages at V-DD = 0.3 V in comparison to the conventional 8T SRAM cell. The results at different PVT corners are also captured to validate the impeccable performance of the proposed cell irrespective of operating conditions.