High Voltage Tolerant Integrated Buck Converter in 65nm 2.5V CMOS

被引：1

作者：

Emira, Ahmed ^{[1
,3
]}

Carr, Frank ^{[2
]}

Elwan, Hassan ^{[2
]}

Mekky, Rania H. ^{[1
]}

机构：

[1] Newport Media Inc, Cairo, Egypt

[2] Newport Media Inc, Lake Forest, IL USA

[3] Cairo Univ, Fac Engn, Cairo, Egypt

来源：

ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 | 2009年

关键词：

D O I：

10.1109/ISCAS.2009.5118285

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5V while using 2.5V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DC-DC switches to protect it against overvoltage breakdown. 5MHz switching frequency is used to allow using smaller external inductors. The Buck converter is implemented in TSMC 65nm CMOS technology and it occupies 0.15mm(2) while the LDO regulator, bandgap, clock generator and bias circuits occupy 0.19mm(2). Up to 88% and 77% efficiency is achieved at 2.5V and 1.2V output, respectively, using 3.6V input. If the input voltage is limited to 3.3V, the LDO regulator is bypassed, and the peak efficiency becomes 92% for 2.5V and 85% for 1.2V output.

引用

页码：2405 / +

页数：2

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