Grain and grain-boundary control of the transfer characteristics of large-grain polycrystalline silicon thin-film transistors

被引:27
作者
Farmakis, FV
Brini, J
Kamarinos, G
Angelis, CT
Dimitriadis, CA
Miyasaka, M
Ouisse, T
机构
[1] ENSERG, LPCS, F-38016 Grenoble 1, France
[2] Univ Thessaloniki, Dept Phys, GR-54006 Thessaloniki, Greece
[3] Seiko Epson Corp, Base Technol Res Ctr, Nagano 392, Japan
关键词
polycrystalline; thin-film transistor; large-grain polysilicon; laser-annealing; grain boundary;
D O I
10.1016/S0038-1101(00)00022-8
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Thin-film transistors (TFTs), fabricated on solid-phase-crystallized polycrystalline silicon (polysilicon) films subjected to laser annealing, were studied. For the resulting large-grain polysilicon TFTs, a model is proposed that takes into account two well-distinguished regions within the channel of the transistor: the intra-grain region and the grain boundaries. By using this model, we found that the extracted on-voltage is mainly grain-boundary dependent while the maximum transconductance is mostly intra-grain defect dependent. Moreover, with the aid of this model, the physics of the large-grain polysilicon TFTs becomes more evident and an optimal laser energy density was found for best device performance. (C) 2000 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:913 / 916
页数:4
相关论文
共 10 条
[1]   Effect of excimer laser annealing on the structural and electrical properties of polycrystalline silicon thin-film transistors [J].
Angelis, CT ;
Dimitriadis, CA ;
Miyasaka, M ;
Farmakis, FV ;
Kamarinos, G ;
Brini, J ;
Stoemenos, J .
JOURNAL OF APPLIED PHYSICS, 1999, 86 (08) :4600-4606
[2]   Modeling of laser-annealed polysilicon TFT characteristics [J].
Armstrong, GA ;
Uppal, S ;
Brotherton, SD ;
Ayres, JR .
IEEE ELECTRON DEVICE LETTERS, 1997, 18 (07) :315-318
[3]   An analytical grain-barrier height model and its characterization for intrinsic poly-Si thin-film transistor [J].
Chen, HL ;
Wu, CY .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (10) :2245-2247
[4]   EFFECTS OF GRAIN-BOUNDARIES ON THE CHANNEL CONDUCTANCE OF SOI MOSFETS [J].
FOSSUM, JG ;
ORTIZCONDE, A .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1983, 30 (08) :933-940
[5]   Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFT's [J].
Jacunski, MD ;
Shur, MS ;
Hack, M .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (09) :1433-1440
[6]   HYDROGENATION OF TRANSISTORS FABRICATED IN POLYCRYSTALLINE-SILICON FILMS [J].
KAMINS, TI ;
MARCOUX .
ELECTRON DEVICE LETTERS, 1980, 1 (08) :159-161
[7]   2-DIMENSIONAL SIMULATION STUDY OF FIELD-EFFECT OPERATION IN UNDOPED POLY-SI THIN-FILM TRANSISTORS [J].
KONG, HS ;
LEE, CC .
JOURNAL OF APPLIED PHYSICS, 1995, 78 (10) :6122-6131
[8]   CONDUCTIVITY BEHAVIOR IN POLYCRYSTALLINE SEMICONDUCTOR THIN-FILM TRANSISTORS [J].
LEVINSON, J ;
SHEPHERD, FR ;
SCANLON, PJ ;
WESTWOOD, WD ;
ESTE, G ;
RIDER, M .
JOURNAL OF APPLIED PHYSICS, 1982, 53 (02) :1193-1202
[9]  
MIYASAKA M, 1999, 9 INT C SIL INS TECH
[10]   PASSIVATION KINETICS OF 2 TYPES OF DEFECTS IN POLYSILICON TFT BY PLASMA HYDROGENATION [J].
WU, IW ;
HUANG, TY ;
JACKSON, WB ;
LEWIS, AG ;
CHIANG, A .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (04) :181-183