Channel Protection Layer Effect on the Performance of Oxide TFTs

被引:74
作者
Park, Sang-Hee Ko [1 ]
Cho, Doo-Hee [1 ]
Hwang, Chi-Sun [1 ]
Yang, Shinhyuk [1 ]
Ryu, Min Ki [1 ]
Byun, Chun-Won [1 ]
Yoon, Sung Min [1 ]
Cheong, Woo-Seok [1 ]
Cho, Kyoung Ik [1 ]
Jeon, Jae-Hong [2 ]
机构
[1] ETRI, Convergence Components & Mat Res Lab, Taejon, South Korea
[2] Korea Aerosp Univ, Sch Elect Telecommun & Comp Engn, Goyang, Gyeonggido, South Korea
关键词
ZnO TFT; AZTO TFT; channel protection layer; ALD; bias stability; THIN-FILM TRANSISTORS; TRANSPARENT; TEMPERATURE;
D O I
10.4218/etrij.09.1209.0043
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.
引用
收藏
页码:653 / 659
页数:7
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