Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications

被引：8

作者：

Moussa, M. Si

Pavageau, C.

Lederer, D.

Picheta, L.

Danneville, F.

Fel, N.

Russat, J.

Raskin, J. -P.

Vanhoenacker-Janvier, D.

机构：

[1] Catholic Univ Louvain, EMIC, Microwave Lab, B-1348 Louvain, Belgium

[2] IEMN, UMR CNRS 8520, F-59652 Villeneuve Dascq, France

[3] CEA, DIF, F-91680 Bruyeres Le Chatel, France

来源：

SOLID-STATE ELECTRONICS | 2006年 / 50卷 / 11-12期

关键词：

CMOS; MMIC; silicon-on-insulator; TFMS; CPW; standard and high resistivity; high-temperature effect;

D O I：

10.1016/j.sse.2006.10.008

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Practical application of integrated circuits requires operation over a wide temperature range. In the case of microwave monolithic integrated circuits (MMICs), the quality of the interconnections as well as the passive matching networks in term of losses is predominent. Therefore, there is a need to investigate the performances of transmission line structures on Si-based substrates in a wide temperature range, as a function of frequency. The behaviour of 50 Omega thin film microstrip (TFMS) and coplanar waveguide (CPW) transmission line topologies on both standard and high resistivity silicon-on-insulator (SOI) substrates versus high temperature is presented. (c) 2006 Elsevier Ltd. All rights reserved.

引用

页码：1822 / 1827

页数：6

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