Discussion of some questions in embedded systematic design of Nios

被引：0

作者：

Xiong Guohai ^{[1
]}

Wan Junli ^{[1
]}

Huang Nanshan ^{[1
]}

机构：

[1] China Three Gorges Univ, Coll Elect Engn & Informat Sci, Yichang 443002, Peoples R China

来源：

PROCEEDINGS OF THE FIRST INTERNATIONAL SYMPOSIUM ON TEST AUTOMATION & INSTRUMENTATION, VOLS 1 - 3 | 2006年

关键词：

Nios CPU; embedded system; FPGA; SOPC; IP core;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Nios embedded system based on Field Programmable Gate Array (FPGA) is flexible, highly efficient, and easy to use. This text analyzes the basic characteristics of a Nios CPU. It discusses the embedded systematic hardware design and the process of software production, the function with intellectual property core. debugging method and means of Nios embedded system, usage of Hardware Abstraction Layer(HAL) systematic library. It also shows the convenience and practicability of the embedded system through one example. The combination of Nios embedded system and FPGA, make Electronic Design Automation(EDA) technology takes another step forward.

引用

页码：1465 / 1469

页数：5