A D-Band CMOS Amplifier With a New Dual-Frequency Interstage Matching Technique

被引：33

作者：

Kim, Dong-Hyun ^{[1
]}

Kim, Doyoon ^{[1
]}

Rieh, Jae-Sung ^{[1
]}

机构：

[1] Korea Univ, Sch Elect Engn, Seoul 136713, South Korea

来源：

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | 2017年 / 65卷 / 05期

基金：

新加坡国家研究基金会;

关键词：

Amplifier; millimeter-wave circuits; wideband; LOW-NOISE-AMPLIFIER; DISTRIBUTED-AMPLIFIER; OUTPUT POWER; GAIN;

D O I：

10.1109/TMTT.2017.2655508

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new interstage matching technique has been proposed and successfully applied to a D-band amplifier in a 65-nm CMOS technology. The proposed technique is based on a simultaneous conjugate matching at the interstages of multistage amplifiers at two frequencies, resulting in an increased bandwidth. The six-stage amplifier designed based on this technique shows a peak gain of 13.8 dB at 113.7 GHz with a 3-dB bandwidth of 11.2 GHz (110.6-121.8 GHz) without balun loss compensation, while consuming a dc power of 40 mW. Measured noise figure shows a minimum value of 10.8 dB at 115 GHz. The output P-1 dB and the saturation output power P-sat are -14 and -3 dBm, respectively. The circuit occupies an area of 1100 x 550 mu m(2).

引用

页码：1580 / 1588

页数：9

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