Enhancement-Mode Silicon Nanowire Field-Effect Transistors on Plastic Substrates

The construction of enhancement-mode field-effect transistors (FET) with n-channels consisting of n+ -p-n+-doped Si NWs on plastic substrates, was demonstrated. The Si wafer was subjected to thermal oxidation, and a SiO2 layer was employed as a mask layer since the conventional photoresist mask layer was damaged by the alkaline aqueous solution used as a crystallographic etchant in the subsequent experiment. Stepper photolithography was used to define the desired width and length of the Si NWs. Then, the anisotropic etching of SiO2 and Si to form trenches was performed by means of an inductively coupled plasma treatment. The top-gate NW FET device fabricated from a transferred n+ -p-n+-Si NW exhibits superior mobility to an n-type/intrinsic/n-type NW FET with a back-gate structure on a Si substrate using a Si NW.