A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection

被引：2

作者：

Kim, Hyunjin ^{[1
]}

Kim, Hong-Sik ^{[1
]}

Lee, Jung-Hee ^{[2
]}

Ahn, Jin-Ho ^{[3
]}

Kang, Sungho ^{[1
]}

机构：

[1] Yonsei Univ, Dept Elect & Elect Eng, Seoul 120749, South Korea

[2] ETRI, Broadcasting & Telecommun Convergence Res Lab, Taejon, South Korea

[3] Hoseo Univ, Dept Elect Eng, Asan, Chungnam, South Korea

来源：

IEICE TRANSACTIONS ON COMMUNICATIONS | 2010年 / E93B卷 / 02期

关键词：

computer network security; deep packet inspection; finite state machine; pattern matching; network monitoring;

D O I：

10.1587/transcom.E93.B.396

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore, total memory requirements can be minimized.

引用

页码：396 / 398

页数：3

共 13 条

[1] A Memory-Efficient Bit-Split Pattern Matching Architecture Using Shared Match Vectors for Deep Packet Inspection
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[2] A Pattern Partitioning Algorithm for Memory-Efficient Parallel String Matching in Deep Packet Inspection
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[3] A Memory-Efficient Bit-Split Parallel String Matching Using Pattern Dividing for Intrusion Detection Systems
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[10] Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm
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