Ultra Low-Power 12-bit SAR ADC for RFID Applications

被引：0

作者：

De Venuto, Daniela ^{[1
]}

Stikvoort, Eduard ^{[2
]}

Castro, David Tio ^{[2
]}

Ponomarev, Youri ^{[2
]}

机构：

[1] DEE Politecn Bari, Bari, Italy

[2] NXP Semicond, Eindhoven, Netherlands

来源：

2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010) | 2010年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The design and first measuring results of an ultra-low power 12bit Successive-Approximation ADC for autonomous multi-sensor systems are presented. The comparator and the DAC are optmised for the lowest power consumption. The proposed design has a power consumption of 0.52 mu W at a bitclock of 50-kHz and of 0.85 mu W at 100-kHz with a 1.2-V supply. As far as we know, the Figure-of-Merit of 66 fJ/convertion-step is the best reported so far. The ADC was realised in the NXP CMOS 0.14 mu m technology with an area of 0.35 mm(2). Only four metal layers were used in order to allow 3D integration of the sensors.

引用

页码：1071 / 1075

页数：5

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