Representing Topological Structures for 3-D Floorplanning

被引:3
作者
Wang, Renshen [1 ]
Young, Evangeline F. Y.
Cheng, Chung-Kuan [1 ]
机构
[1] Univ Calif San Diego, La Jolla, CA 92093 USA
来源
2009 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLUMES I & II: COMMUNICATIONS, NETWORKS AND SIGNAL PROCESSING, VOL I/ELECTRONIC DEVICES, CIRUITS AND SYSTEMS, VOL II | 2009年
关键词
D O I
10.1109/ICCCAS.2009.5250323
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
3-D VLSI circuit is becoming a hot topic because of its potential of enhancing performance, while it is also facing challenges such as the increased complexity on floorplanning and placement. Efficient 3-D floorplan representations are needed to handle the placement optimization in new circuit designs. We review and categorize some state-of-the-art 3-D representations, and propose a twin quaternary tree (TQT) model for 3-D mosaic floorplans, extending the twin binary tree [16]. Differences between 2-D and 3-D mosaic floorplans are discussed and some 3-D properties not existing in 2-D are revealed. Though the efficiency of the twin tree for optimization heuristics is still an open question, insights from the discussions and conclusions can be helpful for 3-D physical design.
引用
收藏
页码:1098 / +
页数:2
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