Four-Level Quasi-Nested Inverter Topology for Single-Phase Applications

被引:3
作者
Reusser, Carlos A. [1 ]
Young, Hector [2 ]
机构
[1] Pontificia Univ Catolica Valparaiso, Sch Elect Engn, Valparaiso 2340000, Chile
[2] Univ La Frontera, Dept Elect Engn, Temuco 4811230, Chile
关键词
multilevel inverter; quasi-Nested topology; reduced active switches topology; level-shifted PWM; DC-link voltage self-balancing; single-phase applications; proportional multi resonant controller;
D O I
10.3390/electronics10030233
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, a novel four-level single-phase multilevel converter is introduced, consisting of six active switches arranged in a quasi-nested configuration. The proposed topology synthesizes its output voltage levels with respect to a floating neutral point, using four cascaded capacitors with identical voltage levels. The proposed converter contains a reduced number of components compared to the neutral point clamped (NPC) or active-NPC topologies (ANPC) for the same number of output voltage levels, since it does not require diode or active switch clamping to a neutral point. Moreover, no floating capacitors with asymmetric voltage levels are employed, thereby simplifying the capacitor voltage balancing. The switching operation principles, modulation technique and control scheme for supplying a single-phase resistive-inductive load are addressed in detail. The proposed four-level inverter allows generating an additional output voltage level with the same semiconductor count as conventional three-level inverters such as NPC and ANPC which allows a superior waveform quality, with a THDv reduction of 32.69% in comparison the clamped inverters. Experimental tests carried out in a laboratory-scale setup verify the feasibility of the proposed topology.
引用
收藏
页码:1 / 19
页数:19
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