Optical interconnects to silicon CMOS using densely-integrated optoelectronics

被引:0
作者
Keeler, GA [1 ]
机构
[1] Stanford Univ, Ginzton Lab, Stanford, CA 94305 USA
来源
INTEGRATED OPTOELECTRONICS, PROCEEDINGS | 2002年 / 2002卷 / 04期
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Silicon CMOS integrated circuits will continue improving at a rapid pace as feature sizes are reduced. While the physics governing the transistor favors this size reduction, the performance of the wires used for electrical interconnects does not significantly improve under this type of scaling. A new approach to signaling and clock distribution will be needed to take CMOS circuit performance beyond the limits imposed by electrical interconnects. Optical interconnects have the potential to circumvent these limitations, provided a number of technological issues can be addressed. This paper discusses the major problems with electrical interconnects, particularly those of low capacity, high power dissipation, and timing uncertainty. It is shown that an optical approach can potentially reduce or eliminate all of these problems. To fully realize such benefits, dense arrays of optoelectronics must be integrated with silicon circuits; current integration techniques and appropriate I/O devices are considered in detail. Finally, several experimentally-demonstrated systems are described, including such novel approaches as optical clock distribution, the use of ultrafast optical techniques, and wavelength-division multiplexing.
引用
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页码:209 / 235
页数:27
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