Performance Analysis of FinFETs with Strained-Si Fin on Strain-Relaxed Buffer

被引:0
|
作者
Jena, J. [1 ]
Dash, T. P. [1 ]
Mohaptra, E. [1 ]
Das, S. [2 ]
Nanda, J. [3 ]
Maiti, C. K. [4 ]
机构
[1] Siksha O Anusandhan, Dept ECE, Bhubaneswar 751030, Odisha, India
[2] Silicon Inst Technol, Dept ECE, Bhubaneswar 751024, Odisha, India
[3] Siksha O Anusandhan, Dept Phys, Bhubaneswar 751030, Odisha, India
[4] Soura Niloy, Kailash Ghosh Rd, Kolkata 700008, India
来源
PROCEEDINGS OF 2ND INTERNATIONAL CONFERENCE ON VLSI DEVICE, CIRCUIT AND SYSTEM (IEEE VLSI DCS 2020) | 2020年
关键词
FinFETs; Strained-Si Fin; Fin SRB; SCE; TCAD; INTEGRATION; MODEL;
D O I
10.1109/vlsidcs47293.2020.9179862
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The architecture of transistors has now switched from planar to the non-planar vertical structures. The 3-D geometry of such non-planar FinFET structures imposes new challenges especially on the computational level. Silicon channel N-type Fin shaped Field Effect Transistors (n-FinFETs) are being integrated with diamond-shaped embedded Si1-xGex fin Strain-Relaxed Buffer (SRB) to optimize the electrical performance. In this work, the stressor geometry (size and shape) effects on the device performance have been studied in detail. The mobility enhancement in n-FinFETs is observed due to process induced strain to increase the drive current. The higher percentage of Ge content shows better effect on device parameters SS, DIBL and Vm. The drain current is found to be improved for certain Ge content in the fin SRB.
引用
收藏
页码:327 / 330
页数:4
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