Standby Leakage Current Estimation Model for Multi Threshold CMOS Inverter Circuit in Deep Submicron Technology

被引:0
|
作者
Sarkar, Hari [1 ]
Kundu, Sudakshina [1 ]
机构
[1] West Bengal Univ Technol, Dept Comp Sci & Engn, Kolkata, India
来源
2015 19TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT) | 2015年
关键词
CMOS inverter circuit; low and high Vth MTCMOS; subthreshold leakage current; 90nm technology;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multi Threshold CMOS (MTCMOS) circuit can be used to overcome the trade-off between speed and standby leakage current inherent in single threshold CMOS circuit. The simplest form is the dual threshold CMOS (DTCMOS), in which two threshold voltages are used in the same logic circuit. As a result, the standby power can be greatly reduced by this approach which is a key factor for battery operated devices. This paper proposed a model for analytical calculation of standby leakage current for MTCMOS Inverter circuit in 90nm technology. We have used BSIM device model which is a widely used industrial model for standby leakage current modelling of MTCMOS Inverter circuit.
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页数:6
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