High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects

被引：3
|
作者：
Chun, Sunghoon [1 ]
Kim, Yongjoon [1 ]
Kang, Sungho [1 ]
机构：
[1] Yonsei Univ, Dept Elect & Elect Engn, Seoul 120749, South Korea
来源：
PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM | 2007年
关键词：
signal integrity; interconnect test; RLC interconnect model; fault modeling;
D O I：
10.1109/ATS.2007.58
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Unacceptable loss of signal integrity may cause permanent or intermittent harm to the functionality and performance of SoCs. In this paper, considering the interconnection topology information, an abstract model and a new test pattern generation method of signal integrity problems on interconnects are proposed. In addition, previous SPICE-based pattern generation methods are too complex and time consuming to generate test patterns for signal integrity faults. To overcome this problem, we also develop a new high-level test pattern generation method by using the abstract signal integrity fault model. Experimental results show that the proposed signal integrity fault model is more exact for long interconnects than previous approaches. In addition, the proposed method is much faster than the SPICE-based pattern generation method.
引用
收藏
页码：115 / 118
页数：4
相关论文
共 25 条
  • [21] Socket Signal Integrity Assessment for High Speed LPDDR4 Memory Test Applications
    Harb, Shadi M. S.
    Al-Momani, Emad S.
    Yu, Bo
    Alqudah, Rajaa
    2019 IEEE 21ST ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2019,
  • [22] Novel Eye Diagram Estimation Technique to Assess Signal Integrity in High-Speed Memory Test
    Oh, Youngsu
    Han, Dongmin
    Go, Byeongseon
    Lee, Seungtaek
    Jeong, Woosik
    2020 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2020,
  • [23] High Level Fault Modeling and Fault Propagation in Analog Circuits using NLARX Automated Model Generation Technique
    Farooq, Muhammad Umer
    Xia, Likun
    Hussin, Fawnizu Azmadi
    Malik, Aamir Saeed
    2012 4TH INTERNATIONAL CONFERENCE ON INTELLIGENT AND ADVANCED SYSTEMS (ICIAS), VOLS 1-2, 2012, : 846 - 850
  • [24] Differential Interconnects with Integrated Equalization and Common-Mode Filtering for Broadband Signal Integrity Enhancement in High-Speed PAM-4 Signaling
    Pattyn, Tim
    Moerman, Arno
    Huynen, Martijn
    Ginste, Dries Vande
    2024 IEEE 28TH WORKSHOP ON SIGNAL AND POWER INTEGRITY, SPI 2024, 2024,
  • [25] On-chip 20Gbps High-Speed I/O IC Test System for Signal Integrity Characterization in Flip-chip package
    Baek, Hyunho
    Eisenstadt, William R.
    2013 PROCEEDINGS OF IEEE SOUTHEASTCON, 2013,
123