Study of Work-Function Variation for High-κ/Metal-Gate Ge-Source Tunnel Field-Effect Transistors

被引：24

作者：

Lee, Youngtaek ^{[1
]}

Nam, Hyohyun ^{[1
,2
]}

Park, Jung-Dong ^{[2
]}

Shin, Changhwan ^{[1
]}

机构：

[1] Univ Seoul, Sch Elect & Comp Engn, Seoul 130743, South Korea

[2] Dongguk Univ, Div Elect & Elect Engn, Seoul 100715, South Korea

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2015年 / 62卷 / 07期

基金：

新加坡国家研究基金会;

关键词：

Characterization; random variation; RGG; tunnel FET (TFET); variability; work-function variation (WFV); VARIABILITY; FET;

D O I：

10.1109/TED.2015.2436815

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The work-function variation (WFV) in high-kappa/metal-gate (HK/MG) Ge-source tunnel FETs (TFETs) is evaluated using technology computer-aided design simulations. By matching the simulation results with the plot for the ratio of the average grain size to the gate area (i.e., the RGG plot), we find that the slope in the RGG plot for the TFET can be significantly altered depending on three main factors, namely, the gate width, average grain size, and equivalent oxide thickness. In addition, it is verified that the variation of channel potential affects the WFV-induced threshold voltage variation in HK/MG Ge-source TFETs.

引用

页码：2143 / 2147

页数：5

共 15 条

[1]

[Anonymous], P IEEE IEDM DEC

[2]

[Anonymous], P IEEE INT S VLSI TS

[3]

[Anonymous], 2013, SENT DEV US GUID VER

[4] Double-gate tunnel FET with high-κ gate dielectric [J].

Boucart, Kathy ;

Mihai Ionescu, Adrian .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (07) :1725-1733

[5] Hetero-Gate-Dielectric Tunneling Field-Effect Transistors [J].

Choi, Woo Young ;

Lee, Woojun .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (09) :2317-2319

[6] Surface-Roughness-Induced Variability in Nanowire InAs Tunnel FETs [J].

Conzatti, F. ;

Pala, M. G. ;

Esseni, D. .

IEEE ELECTRON DEVICE LETTERS, 2012, 33 (06) :806-808

[7] Grain-Orientation Induced Work Function Variation in Nanoscale Metal-Gate Transistors-Part II: Implications for Process, Device, and Circuit Design [J].

Dadgour, Hamed F. ;

Endo, Kazuhiko ;

De, Vivek K. ;

Banerjee, Kaustav .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (10) :2515-2525

[8] Interface Traps in InAs Nanowire Tunnel FETs and MOSFETs-Part II: Comparative Analysis and Trap-Induced Variability [J].

Esseni, David ;

Pala, Marco G. .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (09) :2802-2807

[9] Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET [J].

Fan, Ming-Long ;

Hu, Vita Pi-Ho ;

Chen, Yin-Nein ;

Su, Pin ;

Chuang, Ching-Te .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (06) :2038-2044

[10]

Kim SH, 2009, 2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P178

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