Two novel low-power and high-speed dynamic carbon nanotube full-adder cells

被引:11
作者
Bagherizadeh, Mehdi [1 ]
Eshghi, Mohammad [2 ]
机构
[1] Islamic Azad Univ, Sci & Res Branch, Tehran, Iran
[2] Shahid Beheshti Univ, GC, Tehran, Iran
来源
NANOSCALE RESEARCH LETTERS | 2011年 / 6卷
关键词
carbon nanotube transistor; dynamic full adder; low power; high speed;
D O I
10.1186/1556-276X-6-519
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold voltages (low threshold, normal threshold, and high threshold) are used. First design generates SUM and COUT through separate transistors, and second design is a multi-output dynamic full adder. Proposed full adders are simulated using HSPICE based on CNFET model with 0.9 V supply voltages. Simulation result shows that the proposed designs consume less power and have low power-delay product compared to other CNFET-based full-adder cells.
引用
收藏
页码:1 / 7
页数:7
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