Direct measurement of residual stress in sub-micron interconnects

The process-induced stress in interconnect structures in modem integrated circuits has a direct influence on the mean time to failure for the device. As the active devices are aggressively scaled to meet the constant demands of the industry, the interconnect structures are also being driven to smaller dimensions and this is increasing the demands made on material scientists to deliver high quality, stress-free metallization. We have demonstrated the measurement of process-induced stress in a single interconnect structure, fabricated in a CMOS compatible process, using a rotating beam sensor. We have shown its applicability in observing the variation in stress level from differing process conditions. Comparison of the rotation observed in the fabricated sensors with finite element simulation using ANSYS is discussed. The structure is suitable for use in a production environment and is scalable to deep sub-micron features for future technology nodes.