A CMOS 8-bit two-step A/D converter with low power consumption

被引:4
作者
Li, XJ [1 ]
Yang, YT [1 ]
Zhu, ZM [1 ]
机构
[1] Xidian Univ, Inst Microelect, Key Lab WGB Semicond, Xian 710071, Peoples R China
来源
PROCEEDINGS OF 2005 IEEE INTERNATIONAL WORKSHOP ON VLSI DESIGN AND VIDEO TECHNOLOGY | 2005年
关键词
D O I
10.1109/IWVDVT.2005.1504460
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
A low cost 8-bit A/D converter based on two-step flash topology is presented in this paper. The design, process technology, and performance of this A/D converter will be described. In order to achieve high precision and low power, a corrected chopper-type comparator which can completed sampling comparison and subtraction has been introduced. The designed A/D converter is fabricated in 0.6 mu m CMOS double-polysilicon and double-metal process technology and occupies an active area of 1.1 mm(2). The measurement results show that the design offers a 133 ns conversion time and dissipates only 6 mW power dissipation at 3 V power supply and 30 mW power dissipation at 5 V power supply separately with 5MHz sampling rate.
引用
收藏
页码:44 / 47
页数:4
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