Record-low 4 mΩ•mm2 specific on-resistance for 20V trench MOSFETs

A process is shown by which both the specific on-resistance R-ds,R-on and the gate-drain charge density Q(gd) can be reduced. Reduction of the R-ds,R-on is achieved by optimising the channel profile (p-body) towards a more box-shaped profile. The Qgd is reduced by going to smaller trench dimensions below the I-line lithography limits, without using deep-UV lithography. For polygonal cell structures, it is shown that narrowing the trenches also gives further R-ds,R-on reduction. Record values for R-ds,R-on of 4 MOmega(.)mm(2) (at V-gs = 10V) have been obtained for a 20V Trench MOSFET with a 2 mum cell pitch. Furthermore, for a 'conventional' 30V Trench MOSFET, we obtained an R-ds,R-on of 7 MOmega(.)mm(2) (at V-gs = 10V) by a more box-shaped p-body profile.