Fractional-order phase-locked loop

被引：0
|
作者：
El-Khazali, Reyad [1 ]
Ahmad, Wajdi [2 ]
机构：
[1] Etisalat Univ Coll, Dept Elect Engn, Sharjah, U Arab Emirates
[2] Univ Sharjah, Dept Elect & Comp Engn, Sharjah, U Arab Emirates
来源：
2007 9TH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, VOLS 1-3 | 2007年
关键词：
fractional-order PLL; fractional order dynamics; fractional filters; fractional voltage-controlled oscillator;
D O I：
暂无
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
In this paper, a fractional-order analog phase-locked loop (FAPLL) model is proposed In the new model, the traditional analog phase locked loop (APLL) is generalized by allowing the loop filters as well as the voltage controlled oscillators to acquire fractional order dynamics. The new model offers superior performance compared to its integer order counterpart in terms of capture and locking time response. The improvement realized in the response of the FAPLL outweighs the slight increase in the loop bandwidth typically seen infractional order systems. The main points of this work are illustrated via numerical examples.
引用
收藏
页码：1326 / +
页数：2
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