Low-power transform-domain coding by separable two-dimensional Hartley-like transform

It presents a low-power realization of transform domain image coding by the 2-dimensional separable discrete Hartley-like transform (HL7) using block size (4 x 4) and spiral scanning of transform coefficients. The proposed HLT-based approach is found to have significantly better performance compared with the existing HLT-based compression scheme which uses block size (8 x 8) and zigzag scanning. Its performance is comparable to the conventional DCT-based approach at low bpp; and it offers significantly higher PSNR compared with the other for coding at more than 1.5 bpp. It would, therefore, be quite useful for compression of picture data with better accuracy. We have proposed a simple circuit involving only one accumulator for computing the 4-point DHT which can be used to implement the 2-D HLT. Using the proposed DHT structure, it is possible to perform the transform domain coding by less than hay the hardware in (1/4)th of the time as the DCT-based method, so as to obtain a reduction of energy consumption to (1/8)th of the other. Moreover, it can lead to a power efficient implementation in the existing programmable micro-processors also, as it involves less than 40% of the computation compared to the DCT-based coding and requires only one routine for the forward, as well as, the inverse transforms.