Design of a CDMA system in FPGA technology

被引:0
作者
Bererber, S. M. [1 ]
Wang, C. [1 ]
Wei, K. K. [1 ]
机构
[1] Univ Auckland, Dept Elect & Comp Engn, Auckland 1, New Zealand
来源
2007 IEEE 65TH VEHICULAR TECHNOLOGY CONFERENCE, VOLS 1-6 | 2007年
关键词
bit error rate (BER); code division multi-access; chaos; field programmable gate arrays;
D O I
10.1109/VETECS.2007.627
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design and implementation of a chaos-based code division multiple access (CDMA) system in FPGA (field programmable gate array) technology. A chaos-based CDMA system uses chaotic sequences as spreading codes to encode each user's message. The user's message can again be separated by the orthogonal property of chaotic sequences at the receiver. Chaos-based communication systems offer higher security than conventional CDMA systems. The system is implemented in Altera Cyclone EP1C20 Nios II Development Board. This paper also presents a system performance analysis by obtaining BER (bit error rate) results from the prototype, computer software simulation and theoretical calculation. The effects of changing the number of users, spreading factor and the inclusion of FIR (finite impulse response) filters on the system performance have been investigated. Real-time transmission of music signals is demonstrated using the prototype implemented in Altera APEX20KE DSP Development Board.
引用
收藏
页码:3061 / 3065
页数:5
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