Batch Fabrication of High-Performance Planar Patch-Clamp Devices in Quartz

被引：12

作者：

Nagarah, John M. ^{[2
]}

Paek, Eunsu ^{[3
]}

Luo, Yi ^{[4
]}

Wang, Pin ^{[5
]}

Hwang, Gyeong S. ^{[3
]}

Heath, James R. ^{[1
]}

机构：

[1] CALTECH, Div Chem & Chem Engn, Kavli Nanosci Inst, Pasadena, CA 91125 USA

[2] CALTECH, Div Biol, Broad Fellows Program, Pasadena, CA 91125 USA

[3] Univ Texas Austin, Cockrell Sch Engn, Austin, TX 78712 USA

[4] Carnegie Mellon Univ, Coll Engn, Pittsburgh, PA 15213 USA

[5] Univ So Calif, Viterbi Sch Engn, Los Angeles, CA 90089 USA

来源：

ADVANCED MATERIALS | 2010年 / 22卷 / 41期

关键词：

SILICON; APERTURES; MEMBRANES;

D O I：

10.1002/adma.201001793

中图分类号：

O6 [化学];

学科分类号：

0703 ;

摘要：

The success of the patch-clamp technique has driven an effort to create wafer-based patch-clamp platforms. We develop a lithographic/electrochemical processing scheme that generates ultrasmooth, high aspect ratio pores in quartz. These devices achieve gigaohm seals in nearly 80% of trials, with the majority exhibiting seal resistances from 20-80 G Omega, competing with pipette-based patch-clamp measurements.

引用

页码：4622 / 4627

页数：6

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