Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging

被引：0
作者：
Lau, John H. [1 ]
Yue, Tang Gong [1 ]
Hoe, Germaine Yen Yi [1 ]
Wu, Zhang Xiao [1 ]
Chong, Chai Tai [1 ]
Damaruganath, Pinjala [1 ]
Vaidyanathan, Kripesh [1 ]
机构：
[1] Hong Kong Univ Sci & Technol, Dept Mech Engn, Kowloon, Hong Kong, Peoples R China
来源：
IPACK 2009: PROCEEDINGS OF THE ASME INTERPACK CONFERENCE 2009, VOL 1 | 2010年
关键词：
D O I：
暂无
中图分类号：
TH [机械、仪表工业];
学科分类号：
0802 ;
摘要：
Thermal performances of 3D SIP (system-in-package) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) the equivalent thermal conductivity of interposers/chips with various copper-filled, aluminum-filled, and polymer w/o filler filled TSV diameters, pitches, and aspect ratios, and (2) the junction temperature and thermal resistance of 3D SIP with various TSV parameters. Useful design charts and guidelines are provided for engineering practice convenient.
引用
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页码：67 / 74
页数：8
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