Comparative Analysis of Processor-FPGA Communication Performance in Low-Cost FPSoCs

被引:11
作者
Fernandez Molanes, Roberto [1 ]
Costas, Lucia [2 ]
Rodriguez-Andina, Juan J. [2 ]
Farina, Jose [2 ]
机构
[1] AIMEN Technol Ctr Poligono Ind Cataboi, Porrino 36418, Spain
[2] Univ Vigo, Dept Elect Technol, Vigo 36310, Spain
关键词
Program processors; Cyclones; Field programmable gate arrays; Delays; Performance evaluation; Data transfer; Hardware; Field-programmable system-on-chip (FPSoC); FPGA; performance characterization; processor-FPGA communications;
D O I
10.1109/TII.2020.3015833
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Field-programmable system-on-chip (FPSoC) devices, combining high-performance processors and FPGA fabric in the same chip, are currently a leading technology in the design of complex digital systems. Since design times are longer than those of systems based on graphic processing units or standalone processors, many efforts are being devoted to develope efficient compilers from high-level languages. Even though, efficient processor-FPGA communication is still an important open issue. To contribute to this area, this article presents an extensive characterization of the processor-FPGA communication delays in Zynq-7000 devices. Although partial analyses of communication performance in these devices have been reported, this is the first work to address very important issues such as the use of DMA for data transfers or the effect of L2 cache controller settings and external RAM controller settings. As a result, data transfer rates are analyzed considering all parameters that influence them. The performance of Zynq-7000 devices is also compared to that of Cyclone V devices, hence covering the two most important current families that dominate the FPSoC market. This information is of utmost importance for designers to optimize processor-FPGA communication and, in turn, the performance of their FPSoC-based systems.
引用
收藏
页码:3826 / 3835
页数:10
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