An improved systolic architecture for LU decomposition

被引:5
|
作者
Kim, DaeGon [1 ]
Rajopadhye, Sanjay V. [1 ]
机构
[1] Colorado State Univ, Dept Comp Sci, Ft Collins, CO 80523 USA
来源
IEEE 17TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, PROCEEDINGS | 2006年
基金
美国国家科学基金会;
关键词
D O I
10.1109/ASAP.2006.12
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
W-Decomposition is a classic problem for which many systolic array implementations have been proposed, the best of which takes 3n - 3 time on n(2)/2 PEs, for a dense, n x n matrix. In this paper we first give a proof that if only nearest neighbor communication is allowed, this time is a lower bound. We then generalize it to 2n + [n/k] - 3 time if one allows k-bounded broadcasts (i.e., if it takes [m/k] time steps to broadcast a value to m destination nodes). We also present a new architecture with this improved execution time, which uses n2/2 PEs, each one consisting of two multiplier-subtractor units, but active only on alternate cycles. This leads to a speedup and efficiency of kn(2)/(6k + 3) and 2k/(6k + 3) respectively. For k = 1, our proposed architecture achieves the performance of the best previously known systolic array implementation. Special cases of our results include similar improvements to algorithms for solving (upper and lower) triangular linear systems by (forward and backward) substitution.
引用
收藏
页码:231 / +
页数:2
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