A methodology and design environment for DSP ASIC fixed point refinement

被引：59

作者：

Cmar, R ^{[1
]}

Rijnders, L ^{[1
]}

Schaumont, P ^{[1
]}

Vernalde, S ^{[1
]}

Bolsens, I ^{[1
]}

机构：

[1] IMEC, B-3001 Heverlee, Belgium

来源：

DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS | 1999年

关键词：

D O I：

10.1109/DATE.1999.761133

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fired point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process. The method uses independent strategies for fixing MSB and LSB weights of fixed point signals. It enables short design cycles by combining the strengths of both analytical and simulation based methods.

引用

页码：271 / 276

页数：6