Optimization of NLDMOS Structure for Higher Breakdown Voltage and Lower On-Resistance

被引：0
|
作者：
Hema, E. P. [1 ]
Sheu, Gene [1 ]
Aryadeep, M. [1 ]
Kurniawan, Erry Dwi [1 ]
Yang, S. M. [1 ]
Chen, P. A. [2 ]
机构：
[1] Asia Univ, Dept Comp Sci & Informat Engn, Taichung, Taiwan
[2] Nuvoton Technol Corp, Taipei 30077, Taiwan
来源：
2014 IEEE 8TH INTERNATIONAL POWER ENGINEERING AND OPTIMIZATION CONFERENCE (PEOCO) | 2014年
关键词：
LDMOS;
D O I：
暂无
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
In this work, high voltage NLDMOS performance in terms of high blocking voltage and On-Resistance have been investigated. In order to obtain the optimum electrical performance several key factors have been optimized such as linearity of HVNW profile, drift length and source field plate. Linear HVNW profile is obtained by linearity of HVNW mask. NLDMOS having blocking voltage of 100 V - 300 V and lower On-resistance is developed based on 0.35um BCD Technology with less manufacturing cost. It is investigated that NLDMOS has poor performance over blocking voltage of 300V.
引用
收藏
页码：150 / 153
页数：4
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