Code compression based on operand-factorization for VLIW processors

被引：0
|
作者：
Ros, M [1 ]
Sutton, P [1 ]
机构：
[1] Univ Queensland, Sch Informat Technol & Elect Engn, St Lucia, Qld 4072, Australia
来源：
DCC 2004: DATA COMPRESSION CONFERENCE, PROCEEDINGS | 2004年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：559 / 559
页数：1
相关论文
共 50 条
  • [31] A study of loop unrolling for VLIW-based DSP processors
    Sair, S
    Kaeli, DR
    Meleis, W
    1998 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS-SIPS 98: DESIGN AND IMPLEMENTATION, 1998, : 519 - 527
  • [32] An Efficient Configuration Unit Design For VLIW Based Reconfigurable Processors
    Iqbal, M. Aqeel
    Awan, Uzma Saeed
    INMIC: 2008 INTERNATIONAL MULTITOPIC CONFERENCE, 2008, : 47 - +
  • [33] Improved Dictionary-Based Code-Compression Schemes with XOR Reference for RISC/VLIW Architecture
    Chen, Jui-Chun
    Lin, Chang-Hong
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2010, E93A (12) : 2517 - 2523
  • [34] A power-aware code-compression design for RISC/VLIW architecture
    Che-Wei LIN
    Frontiers of Information Technology & Electronic Engineering, 2011, (08) : 629 - 637
  • [35] Code compression for VLIW embedded systems using a self-generating table
    Lin, Chang Hong
    Xie, Yuan
    Wolf, Wayne
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (10) : 1160 - 1171
  • [36] A power-aware code-compression design for RISC/VLIW architecture
    Che-Wei Lin
    Chang Hong Lin
    Wei Jhih Wang
    Journal of Zhejiang University SCIENCE C, 2011, 12 : 629 - 637
  • [37] A power-aware code-compression design for RISC/VLIW architecture
    Lin, Che-Wei
    Lin, Chang Hong
    Wang, Wei Jhih
    JOURNAL OF ZHEJIANG UNIVERSITY-SCIENCE C-COMPUTERS & ELECTRONICS, 2011, 12 (08): : 629 - 637
  • [38] LICT: Left-uncompressed Instructions Compression Technique to Improve the Decoding Performance of VLIW Processors
    Bonny, Talal
    Henkel, Joerg
    DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2009, : 903 - 906
  • [39] VLIW instruction scheduling for DSP processors based on rough set theory
    Xiao, S
    Lai, EMK
    Vinod, AP
    ISSPA 2005: THE 8TH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, VOLS 1 AND 2, PROCEEDINGS, 2005, : 311 - 314
  • [40] Energy estimation and optimization of embedded VLIW processors based on instruction clustering
    Bona, A
    Sami, M
    Sciuto, D
    Silvano, C
    Zaccaria, V
    Zafalon, R
    39TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2002, 2002, : 886 - 891
12345