Optimization of Dual-Fuel Combustion Synthesis for Rapid Formation of Solution-Processed Metal-Oxide Thin-Film Transistors

被引:8
|
作者
Kim, Taegyu [1 ]
Kang, Youngjin [1 ]
Kim, Woojong [1 ]
Park, Joon Bee [2 ]
Park, Sung Kyu [2 ]
Kim, Yong-Hoon [1 ]
机构
[1] Sungkyunkwan Univ, Sch Adv Mat Sci & Engn, Suwon 16419, South Korea
[2] Chung Ang Univ, Sch Elect & Elect Engn, Seoul 156756, South Korea
关键词
oxide semiconductors; solution process; combustion synthesis; dual fuel; thin-film transistors; NEGATIVE BIAS STRESS; TEMPERATURE FABRICATION;
D O I
10.1021/acsaelm.2c00066
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Solution processing of metal-oxide semiconductors has received significant attention in various fields of electronics owing to its advantages such as simple fabrication process, large-area scalability, and facile stoichiometric tunability. However, the conventional sol-gel route requires a relatively long annealing time to obtain a low-defect film with high density and sufficient amount of metal-oxygen-metal bonding state, which prevents implementation in cost-effective continuous manufacturing. Here, we report rapid formation of solution-processed oxide semiconductors by employing a dual-fuel-based solution combustion synthesis route. In particular, by optimizing the ratio of dual fuels of acetylacetone and 1,1,1-trifluoro-acetylacetone (molar ratio of 7:3), high-performance indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) could be fabricated at 350 degrees C with the annealing time as short as 5 min (In:Ga:Zn = 0.68:0.1:0.22). Based on spectroscopic analysis, it was found that the dual fuels enabled rapid formation of the metal-oxygen-metal lattice structure with low defective oxygen bonding states. The IGZO TFTs fabricated with an optimized fuel ratio exhibited average field-effect mobilities of 1.11 and 3.69 cm(2) V-1 s(-1) with annealing times of 5 and 20 min, respectively (averaged in 9 similar to 12 devices). Also, in the case of the 5 min annealed device, the threshold voltage was -0.48 +/- 1.96 V, showing enhancement-mode operation. Furthermore, the device showed good stability against both positive gate bias stress and negative gate bias stress conditions with small threshold voltage shifts of -1.28 and - 1.28 V in 5760 s, respectively.
引用
收藏
页码:1327 / 1334
页数:8
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