Thermal-aware TSV Repair for Electromigration in 3D ICs

被引:0
|
作者
Wang, Shengcheng [1 ]
Tahoori, Mehdi B. [1 ]
Chakrabarty, Krishnendu [2 ]
机构
[1] Karlsruhe Inst Technol, CDNC, Karlsruhe, Germany
[2] Duke Univ, Dept ECE, Durham, NC USA
来源
PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) | 2016年
关键词
THROUGH-SILICON; INTEGRATED-CIRCUITS; POWER;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Electromigration (EM) occurrence on through-silicon-vias (TSVs) is a major reliability concern for Three-Dimensional Integrated-Circuits (3D ICs), and EM can severely reduce the mean-time-to-failure (MTTF). In this work, a novel fault tolerant technique is proposed to increase the MTTF of the functional TSV network through the assignment of spare TSVs to EM-vulnerable functional TSVs. The objective is to meet the target MTTF with minimum spare TSVs and minimal impact on the circuit timing. By considering the impact of temperature variation, the proposed technique provides a more robust repair solution for EM-induced TSV defects with minimum delay overhead, compared to previous thermal-unaware methods.
引用
收藏
页码:1291 / 1296
页数:6
相关论文
共 50 条
  • [1] Recovery-aware Proactive TSV Repair for Electromigration in 3D ICs
    Wang, Shengcheng
    Zhao, Hongyang
    Tan, Sheldon X. -D.
    Tahoori, Mehdi B.
    PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2017, : 220 - 225
  • [2] Thermal-aware P/G TSV planning for IR drop reduction in 3D ICs
    Li, Zuowei
    Ma, Yuchun
    Zhou, Qiang
    Cai, Yici
    Xie, Yuan
    Huang, Tingting
    INTEGRATION-THE VLSI JOURNAL, 2013, 46 (01) : 1 - 9
  • [3] Thermal-aware incremental floorplanning for 3D ICs
    Li, Xin
    Ma, Yuchun
    Hong, Xianlong
    Dong, Sheqin
    ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1092 - 1095
  • [4] A Thermal-Aware Distribution Method of TSV in 3D IC
    Hou, Ligang
    Fu, Jingyan
    Wang, Jinhui
    Gong, Na
    Zhao, Wei
    Geng, Shuqin
    PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2015,
  • [5] Thermal-aware steiner routing for 3D stacked ICs
    Pathak, Mohit
    Lim, Sung Kyu
    IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2007, : 205 - 211
  • [6] TSV-driven 3D ICs: An innovative thermal-aware and stress-reliable design strategy
    2016 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC), 2016,
  • [7] A novel thermal-aware structure of TSV cluster in 3D IC
    Hou, Ligang
    Fu, Jingyan
    Wang, Jinhui
    Gong, Na
    MICROELECTRONIC ENGINEERING, 2016, 153 : 110 - 116
  • [8] The Thermal-aware Floorplanning for 3D ICs using carbon nanotube
    Shi, Shengqing
    Zhang, Xi
    Luo, Rong
    PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS), 2010, : 1155 - 1158
  • [9] P* Admissible Thermal-Aware Matrix Floorplanner for 3D ICs
    Al Saleh, Dima
    Safari, Yousef
    Amik, Fahad Rahman
    Vaisband, Boris
    2023 IEEE 36TH INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE, SOCC, 2023, : 160 - 165
  • [10] Thermal-aware Floorplanning Guidelines for 3D ICs with Integrated Microchannels
    Zajac, Piotr
    Galicia, Melvin
    Napieralski, Andrzej
    PROCEEDINGS OF THE 25TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEM (MIXDES 2018), 2018, : 258 - 261