A Low-Power, High-Fidelity Stereo Audio Codec in 0.13 μm CMOS

被引：16

作者：

Jiang, Xicheng ^{[1
]}

Song, Jungwoo ^{[1
]}

Chen, Jianlong ^{[1
]}

Chandrasekar, Vinay ^{[1
]}

Galal, Sherif ^{[1
]}

Cheung, Felix Y. L. ^{[1
]}

Cheung, Darwin ^{[1
]}

Brooks, Todd L. ^{[1
]}

机构：

[1] Broadcom Corp, Irvine, CA 92617 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2012年 / 47卷 / 05期

关键词：

Capacitive direct feedback; capacitive-feed forward; class-AB amplifier; continuous-time Sigma Delta ADC; microphone interface; quiescent current control; replica bias; speaker interfaces; stereo audio codec; transconductance cell; AMPLIFIER;

D O I：

10.1109/JSSC.2012.2185591

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 1.5 V low-power stereo audio codec in 0.13 mu m CMOS is described. The microphone path includes a programmable gain stage with an enhanced transconductance cell followed by a continuous-time Sigma Delta ADC with capacitive feed-forward and capacitive direct feedback. The speaker path employs a 1 mA Class-AB speaker amplifier with an improved quiescent current control circuit that delivers 30 mW to a 32 Omega speaker. The audio input and output paths achieve 92 and 98 dB dynamic range, respectively, with 6.5 mA total quiescent current.

引用

页码：1221 / 1231

页数：11

共 50 条

[31] A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM
Shi, Dashan
You, Heng
Yuan, Jia
Wang, Yulian
Qiao, Shushan
IEICE TRANSACTIONS ON ELECTRONICS, 2022, E105C (11) : 712 - 719
[32] A Low-Power Inductor-Less Linear Wideband CMOS Balun-LNA Using Current Reuse And Linearity Techniques
Bani, Soroush Hashemi
Yavari, Mohammad
2023 5TH IRANIAN INTERNATIONAL CONFERENCE ON MICROELECTRONICS, IICM, 2023, : 160 - 164
[33] A Low-Power Wideband High Dynamic Range Single-Stage Variable Gain Amplifier
Verma, Vivek
Parikh, Chetan D.
VLSI DESIGN AND TEST, VDAT 2013, 2013, 382 : 19 - 25
[34] A high slew-rate and low-power buffer amplifier for high resolution TFT-LCD drivers
Lai, Hsin-Chi
Lin, Zhi-Ming
IMECS 2007: INTERNATIONAL MULTICONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS, VOLS I AND II, 2007, : 675 - +
[35] A 10-Gb/s Inductorless Low-Power TIA With a 400-fF Low-Speed Avalanche Photodiode Realized in CMOS Process
Ding, Haofan
Dai, Haiyan
Hong, Xin
Chen, Deyan
Wu, Junyuan
Li, Jinghu
Luo, Zhicong
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 31 (04) : 512 - 521
[36] A 60-GHz Low-Power Active Phase Shifter With Impedance-Invariant Vector Modulation in 65-nm CMOS
Park, Geon Ho
Byeon, Chul Woo
Park, Chul Soon
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2020, 68 (12) : 5395 - 5407
[37] An Optimized Low-Power Band-Tuning TX for Short-Range FMCW Radar in 22-nm FDSOI CMOS
Rengifo, Sammy Cerida
Chicco, Francesco
Le Roux, Erwan
Enz, Christian
ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), 2021, : 467 - 470
[38] A 0.7-V 60-GHz Low-Power LNA with Forward Body Bias Technique in 90 nm CMOS Process
Lin, Wei-Heng
Tsai, Jeng-Han
Jen, Yung-Nien
Huang, Tian-Wei
Wang, Huei
2009 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, 2009, : 393 - +
[39] A Novel High-Speed High-Gain and Low-Noise CMOS Amplifier in 0.18μm Process
Mahdavi, Sina
Noruzpur, Faeze
Esmaeilie, Shahram
Sadeghi, Amin
Mohammady, Arvin
2019 IEEE 5TH CONFERENCE ON KNOWLEDGE BASED ENGINEERING AND INNOVATION (KBEI 2019), 2019, : 799 - 802
[40] A CMOS low voltage, very low power fully differential orderly current buffer with ultra low input impedance and high CMRR
Azhari, Seyed Javad
Zareie, Mahsa
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2019, 99 (03) : 509 - 527

← 1 2 3 4 5 →