Development of TRL5 Space Qualified Hardware for Tuning, Biasing, and Readout of Kilopixel TES Bolometer Arrays

被引:0
作者
Smecher, Graeme [1 ]
Cameron, Peter [2 ]
Cliche, Jean-Francois [3 ]
Dobbs, Matt [3 ]
Montgomery, Joshua [3 ]
机构
[1] Three Speed Log, Victoria, BC, Canada
[2] Honeywell Aerosp, Ottawa, ON, Canada
[3] McGill Univ, Montreal, PQ, Canada
来源
MILLIMETER, SUBMILLIMETER, AND FAR-INFRARED DETECTORS AND INSTRUMENTATION FOR ASTRONOMY XI | 2022年 / 12190卷
关键词
Bolometer; FPGA; CMB; satellite; SQUID;
D O I
10.1117/12.2629085
中图分类号
P1 [天文学];
学科分类号
0704 ;
摘要
The next generation of space-based mm-wave telescopes, such as JAXA's LiteBIRD mission, require focal planes with thousands of detectors in order to achieve their science goals. Digital frequency-domain multiplexing (dfmux) techniques allow detector counts to scale without a linear growth in wire harnessing, sub-Kelvin refrigerator loads, and other scaling problems. In this paper, we introduce Technology Readiness Level 5 (TRL5) electronics suitable for biasing and readout of LiteBIRD's Transition Edge Sensor (TES) bolometers using dfmux techniques. These electronics sit between the spacecraft's payload computer and the cryogenic focal plane, and provide detector biasing, tuning, and readout interfaces between these detectors and the spacecraft's on-board storage. We describe the overall architecture of the electronics, including functional decomposition into modules, the numerology and interconnection of these modules, and their internal and external interfaces. We describe performance measurements to date, including power consumption, thermal performance, and mass, volume, and reliability estimates. This paper is a companion piece to a description of the electronics' on-board Field-Programmable Gate Array (FPGA) firmware.
引用
收藏
页数:10
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