Lumped, inductorless oscillators: How far can they go?

被引：6

作者：

Navid, R ^{[1
]}

Lee, TH ^{[1
]}

Dutton, RW ^{[1
]}

机构：

[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA

来源：

PROCEEDINGS OF THE IEEE 2003 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2003年

关键词：

D O I：

10.1109/CICC.2003.1249456

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The fundamental question of how much we can ultimately reduce the phase noise of a lumped, inductorless oscillator through careful design is addressed and it is shown that the fluctuation dissipation theorem of thermodynamics imposes a lower limit on the phase noise. An analytical formulation of this limit is presented and it is shown that the phase noise of ring oscillators with long-channel MOS devices is closer to this limit compared to that of the relaxation oscillators or ring oscillators with short channel MOS devices.

引用

页码：543 / 546

页数：4

共 7 条

[1]

Devito L., 1991, ISSCC, P142

[2] Jitter and phase noise in ring oscillators [J].

Hajimiri, A ;

Limotyrakis, S ;

Lee, TH .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (06) :790-804

[3]

Navid R, 2002, SISPAD 2002: INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, P75, DOI 10.1109/SISPAD.2002.1034520

[4]

NAVID R, UNPUB ANAL FORMULATI

[5] Study of phase noise in CMOS oscillators [J].

Razavi, B .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (03) :331-343

[6] A NEW LOW-NOISE 100-MHZ BALANCED RELAXATION-OSCILLATOR [J].

SNEEP, JG ;

VERHOEVEN, CJM .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (03) :692-698

[7] A PLL CLOCK GENERATOR WITH 5 TO 110 MHZ OF LOCK RANGE FOR MICROPROCESSORS [J].

YOUNG, IA ;

GREASON, JK ;

WONG, KL .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (11) :1599-1607

← 1 →