In this talk I will profile a course in electronic packaging that I am introducing for the spring semester 2001 at Rutgers University Graduate School of Electrical and Computer Engineering. Packaging and its effects on the electrical signal integrity of electronic devices are not addressed in any of the existing courses at Rutgers. Electronic noise and signal distortion are introduced in Transistor Circuit Design and Integrated Transistor Circuit Design. However, the proposed course Electronics Packaging will deal with the electrical characterization and modeling of the parasitic of integrated circuit packaging. The course will be targeted to the general graduate population of Master's students and industry part time graduate students that have a background in circuit analysis. Ph.D. students in Solid State and VLSI design will also find the course useful due to the modeling content.