FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures

被引:38
作者
Anandakumar, N. Nalla [1 ]
Hashmi, Mohammad S. [2 ]
Tehranipoor, Mark [1 ]
机构
[1] Univ Florida, Elect & Comp Engn Dept, Gainesville, FL 32611 USA
[2] Nazarbayev Univ, Sch Engn & Digital Sci, Astana 010000, Kazakhstan
关键词
Physical Unclonable Functions (PUFs); Field-Programmable Gate Array; Hardware security; PUF applications; FPGA based PUFs; EFFECT RING OSCILLATOR; PUF DESIGN; IP PROTECTION; SIDE-CHANNEL; AUTHENTICATION; IMPLEMENTATION; SECURITY; LIGHTWEIGHT; OBFUSCATION; ATTACKS;
D O I
10.1016/j.vlsi.2021.06.001
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Physically Unclonable Functions (PUFs) are a promising technology and have been proposed as central building blocks in many cryptographic protocols and security architectures. Among other uses, PUFs enable chip identifier/authentication, secret key generation/storage, seed for a random number generator and Intellectual Property (IP) protection. Field Programmable Gate Arrays (FPGAs) are re-configurable hardware systems which have emerged as an interesting trade-off between the versatility of standard microprocessors and the efficiency of Application Specific Integrated Circuits (ASICs). In FPGA devices, PUFs may be instantiated directly from FPGA fabric components in order to exploit the propagation delay differences of signals caused by manufacturing process variations. PUF technology can protect the individual FPGA IP cores with less overhead. In this article, we first provide an extensive survey on the current state-of-the-art of FPGA based PUFs. Then, we provide a detailed performance evaluation result for several FPGA based PUF designs and their comparisons. Subsequently, we briefly report on some of the known attacks on FPGA based PUFs and the corresponding countermeasures. Finally, we conclude with a brief overview of the FPGA based PUF application scenarios and future research directions.
引用
收藏
页码:175 / 194
页数:20
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