WIRELENGTH DRIVEN PLACEMENT FOR FPGA USING SOFT COMPUTING TECHNIQUE

被引：0
|
作者：
Venuopal, Nagalakshmi [1 ]
Manimegalai, R. [2 ]
机构：
[1] Dr NGP Inst Technol, Coimbatore, Tamil Nadu, India
[2] Pk Coll Engn & Technol, Coimbatore, Tamil Nadu, India
来源：
PROCEEDINGS OF THE IEEE INTERNATIONAL CONFERENCE ON SOFT-COMPUTING AND NETWORKS SECURITY (ICSNS 2015) | 2015年
关键词：
FPGA; Placer; Placement; Optimization; Routing;
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Placement is the one of the important step in the Field Programmable Gate Array (FPGA) design flow. A successful placement provides complete and optimal routing for the circuit that is to be configured on the FPGA. In this paper an efficient placement algorithm based on Particle Swarm Optimization (PSO), PSO_Placer, is proposed. The proposed PSO based Placement algorithm focuses on minimizing the wirelength and channel width. The results obtained using proposed PSO based placement algorithm is encouraging when compared to existing placement techniques for FPGA.
引用
收藏
页数：5
相关论文
共 50 条
  • [31] Architecture-aware FPGA placement using metric embedding
    Gopalakrishnan, Padmini
    Li, Xin
    Pileggi, Lawrence
    43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 460 - +
  • [32] Investigating and Ranking Blasting Patterns to Reduce Ground Vibration using Soft Computing Approaches and MCDM Technique
    Mohammadi, D.
    Mikaeil, R.
    Sharif, J. Abdollahei
    JOURNAL OF MINING AND ENVIRONMENT, 2020, 11 (03): : 881 - 897
  • [33] A Multi-Objective-Driven Placement Technique for Digital Microfluidic Biochips
    Wan, Chaowei
    Chen, Xiaodao
    Liu, Dongbo
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2019, 28 (05)
  • [34] An Application Placement Technique for Concurrent IoT Applications in Edge and Fog Computing Environments
    Goudarzi, Mohammad
    Wu, Huaming
    Palaniswami, Marimuthu
    Buyya, Rajkumar
    IEEE TRANSACTIONS ON MOBILE COMPUTING, 2021, 20 (04) : 1298 - 1311
  • [35] RF Signal Classification using Boolean Reservoir Computing on an FPGA
    Komkov, Heidi
    Pocher, Liam
    Restelli, Alessandro
    Hunt, Brian
    Lathrop, Daniel
    2021 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN), 2021,
  • [36] USE OF SOFT COMPUTING TECHNIQUE FOR MODELLING AND PREDICTION OF CNC GRINDING PROCESS
    Saric, Tomislav
    Simunovic, Goran
    Lujic, Roberto
    Simunovic, Katica
    Antic, Aco
    TEHNICKI VJESNIK-TECHNICAL GAZETTE, 2016, 23 (04): : 1123 - 1130
  • [37] Design Optimization for High-Performance Computing Using FPGA
    Isik, Murat
    Inadagbo, Kayode
    Aktas, Hakan
    INFORMATION MANAGEMENT AND BIG DATA, SIMBIG 2023, 2024, 2142 : 142 - 156
  • [38] Optimal deflection and stacking sequence prediction of curved composite structure using hybrid (FEM and soft computing) technique
    Sharma, Nitin
    Lalepalli, Anil K.
    Hirwani, Chetan K.
    Das, Arijit
    Panda, Subrata K.
    Topal, Umut
    Dede, Tayfun
    ENGINEERING WITH COMPUTERS, 2021, 37 (01) : 477 - 487
  • [39] A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications
    Homulle, Harald
    Visser, Stefan
    Charbon, Edoardo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2016, 63 (11) : 1854 - 1865
  • [40] A Lean FPGA Soft Processor Built Using a DSP Block
    Cheah, Hui Yan
    Fahmy, Suhaib A.
    Maskell, Douglas L.
    Kulkarni, Chidamber
    FPGA 12: PROCEEDINGS OF THE 2012 ACM-SIGDA INTERNATIONAL SYMPOSIUM ON FIELD PROGRAMMABLE GATE ARRAYS, 2012, : 237 - 240
12345