Converter utilisation ratio assessment for total harmonic distortion optimisation in cascaded H-bridge multi-level inverters

被引:17
作者
Khamooshi, Reza [1 ]
Namadmalan, Alireza [1 ]
机构
[1] Jundi Shapur Univ Technol, Dept Elect Engn, Dezful 64615334, Iran
关键词
invertors; harmonic distortion; minimisation; power conversion harmonics; converter utilisation ratio assessment; total harmonic distortion optimisation; cascaded H-bridge multilevel inverters; variable DC sources; THD minimisation; switch utilisation ratio; phase voltage; line-line voltage; SUR maximisation; DC-link voltages; medium-voltage application; high-voltage application; modulation indices; 11-level cascaded H-bridge inverters; 5-level cascaded H-bridge inverters; 7-level cascaded H-bridge inverters; 9-level cascaded H-bridge inverters; FLYING CAPACITOR; REDUCED NUMBER; PHASE VOLTAGE; DC-LINK; SINGLE; MODULATION; SWITCHES; SCHEME;
D O I
10.1049/iet-pel.2015.0787
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study presents a new solution for harmonic optimisation of multi-level inverters using variable DC sources. The new approach is based on converter utilisation ratio consideration for total harmonic distortion (THD) minimisation. In the proposed solution, switch utilisation ratio (SUR) is introduced as an indication of efficient operation of multi-level converters and is maximised in the final THD minimisation objective functions for both phase and line-line voltages. According to the calculated formula, by SUR maximisation, the DC-link voltages of the cells are minimised which is essential for medium- and high-voltage applications. Alterable DC sources are also considered as degrees of freedom in the final target functions which results in feasible solution for the entire range of the modulation indices. In order to investigate the proposed technique, the simulations are performed for 5-, 7-, 9- and 11-level cascaded H-bridge inverters. Finally, experimental results validate the effectiveness of the suggested scheme for five- and seven-level inverters.
引用
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页码:2103 / 2110
页数:8
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