Shannon-Inspired Statistical Computing for the Nanoscale Era

被引:25
作者
Shanbhag, Naresh R. [1 ]
Verma, Naveen [2 ]
Kim, Yongjune [1 ]
Patil, Ameya D. [1 ]
Varshney, Lav R. [1 ]
机构
[1] Univ Illinois, Coordinated Sci Lab, Urbana, IL 61801 USA
[2] Princeton Univ, Dept Elect Engn, Princeton, NJ 08544 USA
关键词
Artificial intelligence; computing; information theory; machine learning; nanoscale devices; statistical computing; MAXIMUM TOLERABLE NOISE; RELIABLE COMPUTATION; INFORMATION-STORAGE; ENERGY-EFFICIENT; ERROR-DETECTION; INFERENCE; DEVICES; RELIABILITY; SYSTEMS; DESIGN;
D O I
10.1109/JPROC.2018.2869867
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Modern day computing systems are based on the von Neumann architecture proposed in 1945 but face dual challenges of: 1) unique data-centric requirements of emerging applications and 2) increased nondeterminism of nanoscale technologies caused by process variations and failures. This paper presents a Shannon-inspired statistical model of computation (statistical computing) that addresses the statistical attributes of both emerging cognitive workloads and nanoscale fabrics within a common framework. Statistical computing is a principled approach to the design of non-von Neumann architectures. It emphasizes the use of information-based metrics; enables the determination of fundamental limits on energy, latency, and accuracy; guides the exploration of statistical design principles for low signal-to-noise ratio (SNR) circuit fabrics and architectures such as deep in-memory architecture (DIMA) and deep in-sensor architecture (DISA); and thereby provides a framework for the design of computing systems that approach the limits of energy efficiency, latency, and accuracy. From its early origins, Shannon-inspired statistical computing has grown into a concrete design framework validated extensively via both theory and laboratory prototypes in both CMOS and beyond. The framework continues to grow at both of these levels, yielding new ways of connecting systems through architectures, circuits, and devices, for the semiconductor roadmap to march into the nanoscale era.
引用
收藏
页码:90 / 107
页数:18
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