Integration of Current-Reused VCO and Frequency Tripler for 24-GHz Low-Power Phase-Locked Loop Applications

被引:38
作者
Tsai, Pei-Kang [1 ]
Huang, Tzuen-Hsi [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
关键词
Current reuse; frequency tripler; local oscillator (LO); low power; phase-locked loop (PLL); voltage-controlled oscillator (VCO); 0.18-MU-M CMOS; OSCILLATOR; BAND;
D O I
10.1109/TCSII.2012.2188459
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents the integration of an 8-GHz voltage-controlled oscillator (VCO) and a frequency tripler for 24-GHz local oscillator generation. By stacking the VCO and the tripler with a current-reused topology, the power consumption of this integration can be saved. The proposed circuit with a total chip area of 0.7 mm x 0.8 mm is implemented in a 0.18-mu m CMOS process. As the tuning voltage increases from 0 to 2 V, the measured frequency tuning range (FTR) of the VCO is from 7.06 to 8.33 GHz. The final resulting output frequency from the tripler ranges from 21.18 to 24.98 GHz (16.5% FTR). The core circuit totally consumes 5 mA from a 1.8-V supply voltage. The measured phase noises at the VCO and frequency tripler outputs are -113.76 and -105.1 dBc/Hz at 1-MHz offset frequency, respectively, when V-tune is 0 V. The best evaluated figure of merit with tuning is -187.2 dBc/Hz. This integration of a VCO and a frequency tripler exhibits a high potential for the use in low-power 24-GHz phase-locked loops.
引用
收藏
页码:199 / 203
页数:5
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